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  max8796 maxim integrated products. all rights reserved. page 1/5 reliability report for max8796gtj+ plastic encapsulated devices november 30, 2010 maxim integrated products 120 san gabriel dr. sunnyvale, ca 94086 approved by sokhom chum quality assurance reliability engineer downloaded from: http:///
max8796 maxim integrated products. all rights reserved. page 2/5 conclusion the max8796gtj+ successfully meets the quality and reliability standards required of all maxim produ cts. in addition, maxim"s continuous reliability monitoring program ensures that all outgoing product will continue to meet ma xim"s quality and reliabili ty standards. table of contents i. ........device description v. ........quality assurance information ii. ........manufacturing information vi. .......reliability evaluation iii. .......packaging information iv. .......die information .....attachments i. device description a. general the max8796/max8797/max17401 are 1-phase quick-pwm(tm) step-down vid power-supply controllers for in tel notebook cpus and graph ics. the quick-pwm control provides instantaneous response to fast load current steps. active voltage positio ning reduces power dissipat ion and bulk output capacitance requirements and allows ideal positioning compensation for tantalum, polymer, or ceramic bulk output capacitors. t he max8796/max8797/max17401 are intended for two different notebook cpu/gpu core applications: either b ucking down the battery dir ectly to create the core voltage, or else bucking down the +5v system supply. the single-stage conversion method all ows this device to directly step down high-voltage batteries for the highest possible efficiency. alternatively, 2-stage conversion (stepp ing down the +5v system sup ply instead of the battery) at higher switching frequency provides the minimum possible physical size. a slew-rate con troller allows controlled t ransitions between vid codes. a thermistor-based temperature sensor provides programmable thermal protection. a power monit or provides an analog volta ge output proportional to the power consumed by the cpu/gpu. the max8796/max17401 implement both the intel im vp-6 cpu core specification s, as well as the intel gmch graphics core specifications. the max8797 implements the intel gmch graphics core specifications. the max8796 /max17401 are available in a 32-pin tqfn package. the max8797 is available in a 28-pin tqfn package. downloaded from: http:///
max8796 maxim integrated products. all rights reserved. page 3/5 ii. manufacturing information a. description/function: 1-phase, quick-pwm intel imvp-6/gmch controllers b. process: s45 c. number of device transistors: 10146 d. fa brication location: texas e. assembly location: thailand f. date of initial production: january 22, 2010 iii. packaging information a. package type: 32-pin tqfn 5x5 b. lead frame: copper c. lead finish: 100% matte tin d. die attach: conductive e. bondwire: au (1 mil dia.) f. mold material: epoxy with silica filler g. assembly diagram: #05-9000-2634 h. flammability rating: class ul94-v0 i. classification of moisture sensitivity per jedec standard j-std-020-c level 1 j. single layer theta ja: 47c/w k. single layer theta jc: 1.7c/w l. multi layer theta ja: 29c/w m. multi layer theta jc: 2.7 c/w iv. die information a. dimensions: 77 x 73 mils b. passivation: si 3 n 4 /sio 2 (silicon nitride/ silicon dioxide) c. interconnect: al/0.5%cu with ti/tin barrier d. b ackside metallization: none e. minimum metal width: metal1 = 0.5 / metal2 = 0.6 / metal3 = 0.6 microns (as drawn) f. minimum metal spacing: metal1 = 0.45 / metal2 = 0.5 / metal3 = 0.6 microns (as drawn) g. bondpad dimensions: 5 mil. sq. h. i solation dielectric: sio 2 i. die separation method: wafer saw downloaded from: http:///
max8796 maxim integrated products. all rights reserved. page 4/5 = ___1___ = 1.83 (chi square value for mttf upper limit) mttf 192 x 4340 x 96 x 2 v. quality assurance information a. quality assurance contacts: don lipps (manager, reliability engineering) bryan preeshl (vice president of qa) b. outgoing inspection level: 0.1% for all electrical parameters guaranteed by the datasheet. 0.1% for all visual defects. c. observed outgoing defect rate: < 50 ppm d. s ampling plan: mil-std-105d vi. reliability evaluation a. accelerated life test the results of the 135c biased (static) life test are shown in table 1. using these results, the f ailure rate ( ) is calculated as follows: = 11.4 x 10 -9 (where 4340 = temperature acceleration factor assuming an activation energy of 0.8ev) = 11.4 f.i.t. (60% confidence level @ 25c) the following failure rate represents data collected from maxim"s reliability monitor program. maxi m performs quarterly life t est monitors on its processes. this data is published in the reliability report found at http://www.maxi m-ic.com/qa/reliability/mon itor. cumulative monitor data for the s45 process results in a fit rate of 0.49 @ 25c and 8.49 @ 55c (0.8 ev, 60% ucl) b. e.s.d. and latch-up testing (esd lot tdczga027d d/c 0846, latchup lot ? sdczca004h d/c 0802 ) the pe11 die type has been found to have all pins able to withstand a hbm transient pulse of +/-300 per jedec jesd22- a114. latch-up testing has shown that this device withstands a current of +/-250ma. downloaded from: http:///
max8796 maxim integrated products. all rights reserved. page 5/5 table 1 reliability evaluation test results max8796gtj+ test item test condition failure identification sample size number of comments failures static life test (note 1) ta = 135c biased time = 192 hrs. dc parameters 48 0 tdczgq002b, dc 0816 & functionality 48 0 tdczgq002a, dc 0816 note 1: life test data may represent plastic dip qualification lots. downloaded from: http:///


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